[Info-vax] OT: The CPU is irrelevant, it's all about the GPU

[Neil Rieck]

On Mar 12, 8:24 am, billg... at cs.uofs.edu (Bill Gunshannon) wrote:
> In article <eee914d8-b3a0-45e6-a336-f792ed02e... at p20g2000yqi.googlegroups.com>,
>         Neil Rieck <n.ri... at sympatico.ca> writes:
>
> > Quote: "The CPU is irrelevant; it's all about the GPU"
>
> >http://www.charlierose.com/view/interview/10060
>
> > Charlie Rose interviews Nvidia president and CEO, Jen-Hsun Huang
> > (pronounced: gen-son wang). This 38 minute interview from February
> > 2009 features many GPU-related topics including CUDA (Compute Unified
> > Device Architecture).
>
> This was posted a few weeks ago, probably when it was fresh.  In any
> event, hardly the opinion of an unbiased source.
>
> bill
>
> --
> Bill Gunshannon          |  de-moc-ra-cy (di mok' ra see) n.  Three wolves
> billg... at cs.scranton.edu |  and a sheep voting on what's for dinner.
> University of Scranton   |
> Scranton, Pennsylvania   |         #include <std.disclaimer.h>  

You are correct. It is biased but I believe in the message and I think
the engineers at Intel are worried about it too.

There is a quiet revolution occurring in the computer world and most
computer professionals have missed it. If you look at the top-of-the-
line ATI graphics card in 2006, it contained 48 pixel shaders (which
can also be used to to do stream processing as well as other SIMD
goodies such as DSP including molecular science). In 2007 pixel
shaders became semi-programmable (unified) and the number jumped to
320 (at this time they converted from single precision-floating point
to double-precision). In 2008 the number of unified shaders jumped to
800. Some time in Q1 of 2009 the number of unified shaders is rumored
to be either 1200 or 2000. These improvements clearly violate Moore's
Law. Meanwhile, many of these cards support private memory sizes of
512 MB to 2 GB and require their own secondary power connections. In
many ways, they are a full blown computer within a computer which will
not be subjected to the I/O interrupts seen by the host. Think of it,
the host CPU (scalar processor) need only off load tasks to the GPU
(vector processor) like this: "command: create then initialize a 3
dimension array of size X". Doing vector processing this way is
completely different from adding SIMD instructions to your Pentium
processor.

I think I can see why AMD purchased ATI (why reinvent the wheel?). All
last year I was waiting for Intel to purchase Nvidia then was
surprised more than anyone that Intel had decided to go their own way
with a new GPU chip called Larrabee.

http://en.wikipedia.org/wiki/Larrabee_(GPU)
(be sure to expand then inspect the second graphic)

Meanwhile, the technology war between AMD/ATI continues with Nvidia
currently making more clever use of their memory designs. (at least
for now)
http://theovalich.wordpress.com/2008/10/24/why-nvidia-destroys-ati-in-folding-at-hom/
http://theovalich.wordpress.com/2008/11/04/amd-folding-explained-future-reveale/

Neil Rieck
Kitchener/Waterloo/Cambridge,
Ontario, Canada.
http://www3.sympatico.ca/n.rieck/