[Info-vax] Updated VMS Roadmap

[JF Mezei]

John Reagan wrote:

> *COULD* do is expose a latent bug in the compilers.  For instance, the 
> compilers today could generate code that says "these 15 instructions could 
> be done in parallel". 

Ah, I would have thought that the compilers would have optimised code
with knowledge of how many could be done in parralel as opposed to
making as many parralel operations as logically possible even if the CPU
can't handle that many.

So, if each iteration of IA64 since McKinley didn't make architectural
changes visible to compilers, then the introduction of the 8.3 version
to cater to the new IA64 systems (and blades) at that time wouldn't have
created any need to recompile applications.

So the "hardware" patches would have been related more to the systems
than to the chip itself ?