[Info-vax] BOINC for VMS

[John Wallace]

On Mar 13, 11:01 pm, Michael Kraemer <M.Krae... at gsi.de> wrote:
> David Froble schrieb:
>
>
>
> > Well, you did mention "rules of economy".
>
> > The problem was, Alpha did not have anyone in the chip business who
> > wanted it to survive.  HP had come up with their rather stupid design,
> > and got Intel to also support it.  IBM, well, they were and still are IBM.
>
> > If DEC had been able to make a deal with Intel to mfg and develop the
> > Alpha, we'd still be running them (new CPUs) today.
>
> It wasn't intel's job to do Alpha, nor was it anyone else's task,
> it was DEC's job in the first place.
> Sure, DEC would have needed assistance by other dedicated chip makers,
> but those were probably sensible enough not to join that adventure.
> At least this is what the "Alasir" site suggests.
>
> > The technology was good, but that is not enough.
>
> It also wasn't good enough, compared with other RISCs.
> It was just different and very expensive to make.
>
> > You need need
> > dedication to a product. After Ken Olson, it seemed that DEC had no
> > dedication in top management.
>
> Well, it was Olsen who was reluctant to bring Alpha to market
> (if, for example, that Apple story is true).
> It didn't happen until Palmer took over.
>
> > Their mistakes didn't help much either.
> > As for Compaq, I doubt they had any dedication to anything.
>
> > What is interesting is that the latest itanic designs seem to be moving
> > away from "do everything in the compiler" and a bit toward OoO.  At
> > least, if what I read has any substance.
>
> As far as I can see, the Itanic is backpaddling towards RISC concepts,
> i.e. increase clock speeds and throw oodles of cache onto the chip.
>
> > The problem now is, "rules of economy" aren't on the itanic's side ....
>
> well, of course this chip is facing the same problems as Alpha,
> but intel+HP have way deeper pockets than DEC and so far it didn't
> broke their neck.

"DEC would have needed assistance by other chip makers"

And they got it. Mitsubishi and Samsung had licenced Alpha product,
but factors outside their control

"IA64 ... increased clock speeds"

Are you serious?

IA64 in 2004: Around 1.6GHz max.

IA64 in 2012: go see what you can find (in a shipping system, not on
an Intel announcement).

Cache, on the other hand, *is* somewhere where IA64 has progressed.
But if an x86-64 chip had 24MB of L3 on-chip, as today's IA64s have,
how fast would that be on a cache-friendly benchmark?  And how
expensive would it be, and how profitable? And just for laughs, 'cos
it wouldn't have 64bit addressing or arithmetic, how fast would a VAX
with 24MB of L3 cache be when running the 32bit stuff which is still
good enough for huge numbers of people?