[Info-vax] BOINC for VMS
Johnny Billquist
bqt at softjar.se
Tue Mar 13 21:02:27 EDT 2012
On 2012-03-13 17.39, Neil Rieck wrote:
> On Mar 13, 2:50 pm, Johnny Billquist<b... at softjar.se> wrote:
>> On 2012-03-13 05.48, John Wallace wrote:
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>>> On Mar 13, 1:21 am, Neil Rieck<n.ri... at sympatico.ca> wrote:
>>>> Okay so here are a few more questions (based upon coffee discussions today):
>>
>>>> 1) MVI first appears in EV56 which is early to mid 1996. According to the doc archives at Intel, MMX appears in Pentium in mid-1997 (although wikipedia says 1996). Did Intel borrow the idea from Compaq or was this just a coincidence?
>>
>>>> 2) Are there any SIMD instructions in Itanium?
>>
>>>> Neil Rieck
>>>> Kitchener / Waterloo / Cambridge,
>>>> Ontario, Canada.http://www3.sympatico.ca/n.rieck/
>>
>>> SIMD predates both Alpha and x86. E.g. the VAX 6000 vector processor
>>> did SIMD, as doubtless did others less familiar round here.
>>
>>> That said, there have been a number of patent disputes between DEC and
>>> Intel. I don't remember SIMD being mentioned in any of them, but that
>>> may be my memory at fault.
>>
>>> Also due to unreliable memory, I cannot remember the Intel executive's
>>> name or exact words but I do remember one of them once said something
>>> functionally equivalent to "our chips are so advanced now that we've
>>> run out of ideas to copy". Suggestions welcome - it was reported in a
>>> few journals and probably referenced in this ng but I can't easily
>>> find it just now.
>>
>>> Yes there are SIMD instructions in Itanium; the published
>>> documentation has details (and doubtless other sources too).
>>
>> SIMD goes way back. Probably to the 60s. (As do probably everything,
>> there hasn't been much invention in computers in a while...)
>>
>> Does the name Cray ring a bell?
>>
>> Johnny
>
> Yeah, I knew SIMD went way back to the days before microprocessors. I
> remember attending some cool DSP seminars (I think it was 1988 ) at
> Motorola which involved the 88100.
>
> It's just that RISC was supposed to keep everything really simple in
> order to implement superscalar stuff but now my mind was blown
> learning that this technology crept into Alpha as well (I know it
> probably wasn't as hard on the system as the POLY instruction was on
> VAX). I guess I was asking about Intel just because I wanted to
> understand how aggressively they were marketing their stuff.
Oh. RISC can be interpreted in so many ways. Some of them are really not
incompatible with SIMD at all.
If you look at RISC as simple load/store architectures, there is
definitely no problem with having rather complex instructions, as long
as they only operate on registers. The point is, after all, to increase
speed, and the one big bottleneck is memory access.
But I guess you know that. :-)
Johnny
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