[Info-vax] Current VMS engineering quality, was: Re: What's VMS up to these

[glen herrmannsfeldt]

Michael Kraemer <M.Kraemer at gsi.de> wrote:

(snip, I wrote)
>> Also, for S/360, an early C target after the PDP-11, floating point
>> registers are double precision, though you can do single precision
>> arithmetic on them. The single precision multiply instruction always
>> generates a double precision product. It takes two extra instructions
>> and one extra register to zero out the low bits of the product, as
>> many compilers for other languages do.

> Really?
> Iirc there are the MDR and MER instructions, both operating on the same
> register set (0,2,4,6), but in the single precision case only 32 bits
> are used. It's easier than with IEEE, because the exponent is the same
> (16**+-64).

MER generates a double length product from two single length operands.

Much more recently, late in the ESA/390 years, MEER was added to
generate a single precision product. I don't remember if it zeros
the low bits or just leaves them alone.

See:
ftp://public.dhe.ibm.com/software/websphere/awdtools/hlasm/sh93fpov.pdf

It seems that MEE and MEER were added about the same time as 
IEEE (BFP) around 1999.

Otherwise, you SDR to clear a register and then LER to copy the
high order half over after MER. That is, at least, what Fortran
and PL/I compilers do.

That is only needed if you need the value for other double precision 
operations. If you store it with STE then there is no problem.

If you want the extra precision, it also isn't a problem.

-- glen