[Info-vax] OT?: NSK/Alpha/lockstep

John Wallace johnwallace4 at yahoo.co.uk
Thu May 24 03:59:02 EDT 2012


On May 24, 8:02 am, JF Mezei <jfmezei.spam... at vaxination.ca> wrote:
> John Reagan wrote:
> > Never said it was impossible, just work to do.
>
> Are you paid to twiddle your thumbs ? :-) :-) :-)
>
> When Compaq bought Digital, hanges were made to Alpha plans to include
> lockstep functiosn in order to allow Tandem's NSK to be ported to Alpha.
>
> Wouldn't HP have similar pull with Intel to have it add more registers
> to x86 to make it easier to port BCS operatings systems if it wanted to
> do so ?

"hanges were made to Alpha plans to include lockstep functiosn in
order to allow Tandem's NSK to be ported to Alpha."

Were they, really?

Have you forgotten the stuff you read in the "VMS port to x86" thread
you started on 20 March? E.g.Keith Parris's links to NSK
presentations, or mine to the Availability Digest article at
http://www.availabilitydigest.com/public_articles/0308/ns_blades.pdf
which you said you liked?

Some text I posted back there, explaining how Tandem used "commodity"
processors in fault tolerant systems.

Tandem hasn't needed CPU lockstep since they dropped their own
proprietary processor architectures, and that's a LONG time ago in
processor history. This isn't a secret, but it may as well be as far
as the trade media and others are concerned.

In modern Tandem boxes, the synchronisation is not at instruction
level or even main-memory access level but conceptually more like "IO
access level" (or maybe process context switch level). The
synchronisation is not on the CPU chip, not even particularly close to
it, but is managed by a piece of complex external logic called the
Logical Synchronization Unit, which doesn't care about instruction-
level lockstep but does care that each processor's operations result
in the same IO with the outside world (and the same context if a
processor swap has to occur). The LSU also does a lot more than that,
which I won't go into here.



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