[Info-vax] TK50 - this is annoying...

[George Cornelius]

Alfred Falk wrote:

> Johnny Billquist <bqt at softjar.se> wrote in
> news:k5p9uo$d52$1 at Iltempo.Update.UU.SE:
>> On 2012-10-18 16:44, glen herrmannsfeldt wrote:

[...]

>>> The data is written twice, in parallel. Three data bits on 10 tracks.
 
>> I think it's time we kill the just created myth of blocks written
>> backwards, and what not. That has, as far as I know, never been done.
>> 
>> Yes, data is written twice on the tape, on separate tracks, just like
>> you write, Glen.
>> And that is a big reason why data is rather safe on DECtape. You can
>> even punch holes in the tape, and it will still work.
>> 
>> Writing blocks backward would be more headaches that it would be
>> worth, not to mentioning, as I did before, that computers can keep the
>> tape spinning without missing blocks, so there is no need from an
>> optimization point of view.
> 
> If I recall correctly, KM-9 (the sort-of OS DEC offered for the PDP-9)
> wrote alternate blocks to DECtape, and wrote the skipped blocks
> backwards.  Thus, if you imagine a ten-block tape it might be written in
> this order: 0 2 4 6 8 9 7 5 4 3 2 1.  The odd-numbered blocks would be
> processed backwards.
> 
>> If people actually thought about it... I mean, a PDP-11 could keep a
>> disk fed with data without missing blocks, and disk blocks pass by
>> much faster than tapes...
>> (Heck, I could probably keep a disk fed data on a PDP-8 as well, if I
>> thought about it.)

[...]

> Interleaving of disk blocks used to be pretty common.  The bus tranfer
> rates of some systems couldn't keep up with the disk itslf.  I first
> recall seeing interleaving discussed in a CDC 6400 (or maybe Cyber 63)
> manual.  Data General used to do it for some of their drives when
> connected to microNova systems that had (IIRC) 2-bit buses. (Controlled
> by a switch or jumper on the drive or controller.)

Yes, and if you think about it, the issue is sometimes the amount of
time _between_ blocks, during which the system may need to respond to
an interrupt, then do some processing and issue an I/O to start reading
the next one.  Controllers which read a block at a time into a FIFO
for later transfer in programmed I/O mode - a byte or a word at a
time, typically - are especially problematic in this regard, while
more complex DMA based controllers require less processing at the
end of a transfer, many in fact being capable of transferring multiple
blocks without any intervention.

George