[Info-vax] Reimplementing VMS, was: Re: HP adds OpenVMS Mature Product Support beyond the end of Standard Support

[John Reagan]

On Tuesday, February 4, 2014 2:12:35 PM UTC-5, Stephen Hoffman wrote:

> As for introducing dependencies on processor generations or instruction  
> subsets, John's well aware of how the compiler can generate code that 
> can "guard"processor-specific code paths, as that mechanism was 
> implemented with the GEM instruction scheduling used on Alpha -- I'd be 
> shocked if that same approach weren't possible within Itanium.   Just a 
> SMOP, particularly when it's not me doing the programming.  :-)   I'd 
> hesitate to consider some sort of trapping here if that's possible, 
> based on the overhead of unaligned references -- this trapping was 
> implemented on VAX for VVIEF, and with the instruction extension 
> emulation support for the byte-word, count extension and multimedia 
> instruction extensions that is present in OpenVMS Alpha V7.1 and later.
> 

Good point.  GEM does use AMASK for somethings, but not in all places you'd expect.  We did some work on such "fat" binaries to include two (or more) flavors of code sequences and branch to them based on the chip's capabilities but it didn't work out as expected.  Itanium does have instructions to get those capabilities.  Ironically some of those instructions to get the CPU data are documented to be slow/high-overhead instruction which sorta defeats the purpose of using them in a fast sequence.  Of course, the compiler could prefetch that in routine prologues,etc. and cache the value in some predicate.