[Info-vax] Volatile, was: Re: yet another sys$qiow question

[John Reagan]

On Wednesday, August 26, 2015 at 12:52:38 PM UTC-4, JF Mezei wrote:
> On 15-08-26 12:29, John Reagan wrote:
> >There are EVAX_MB builtins used in the code (it is in Macro32) and they make very sure that the first longword is always filled in last (with an MB between storing into the 2nd longword and storing into the 1st longword). 
> 
> Would loading one longword on the left side of a 64 bit register and the
> other on on the right side of the register and then doing a single 64
> bit save to memory solve that problem ?
> 
> (just trying to understand).

It could for the quadword aligned cases.  For longword aligned IOSBs, a quadword store would either get a fault or the compiler would turn it back into two longword stores with no synchronizaton in between.  The explicit MB makes it clear the intent.

The MB in the code path also ensures that data on the way to the buffer gets to memory before the status longword is written.