[Info-vax] ITIC 2014 - 2015 Global Server Hardware, Server OS Reliability Report (was Re: BASIC compiler in the hobbyist distribution)

[Stephen Hoffman]

On 2015-06-01 04:05:06 +0000, Michael Moroney said:

> JF Mezei <jfmezei.spamnot at vaxination.ca> writes:
> 
>> But from an instruction processing point of view, is EV7's logic still 
>> considered state of the art today ?

42.

An answer that is at least as meaningful as the question.

Chips are systems, not isolated instruction decoders.  Getting the 
instructions and the data onto and off the chip — expedient transfers 
to and from memory, and to and from high-speed devices — is just as 
critical as the instruction decoding processes.  EV7 and EV7z are 
internally basically the EV68 core, and were fabricated using 180 nm 
designs.

There is no shrink from 180 nm to 22 nm, BTW.   If the designers could 
just turn a crank handle somewhere, and directly increase the clock 
speed and/or directly shrink the chip designs, that would already have 
happened.

Fundamentally, the building blocks are the same.  Transistors are 
transistors.  But as you shrink the designs, the designs can and 
variously must change.  (Look up FinFET and tri-gate as a starting 
point: <https://en.wikipedia.org/wiki/Multigate_device>, et al.)

BTW, there are some discussions of the EV7 design trade-offs and 
limitations in Wikipedia, too: 
<https://en.wikipedia.org/wiki/Alpha_21364>

> If you ask that type of question, what about EV8, which was under  
> development (I have no idea how far along) at the Alphacide.  Also, EV9 
> was a pipe dream then.

OpenVMS Engineering had received a few presentations on Araña.   (Araña 
was a big bet; on whether it could be built, and if it could deliver.  
>From a semiconductor business perspective, it's preferable to run 
multiple parallel microprocessor design and development projects.  If 
you can afford it.  If one project and one design craters, you still 
have competitive new product to sell until the next replacements are 
available, and to hopefully keep your very expensive fabs filled.  But 
I digress.)  <http://www.realworldtech.com/alpha-ev8-wider/>

Like the EV7 designs, the Araña design work was from over twenty years 
ago, so that's not going to particularly interest anyone now. Other 
than some folks in comp.os.vms, select retronauts, and historians and 
other collectors of computing ephemera, that is.

As was reported once or twice, Alpha too is dead.  Though existing 
servers live on and parts and even some upgrades are still available — 
being dead and all — the architecture itself has not been progressing.  
Though there are vociferous proponents here and it's a nice 
architecture and very speedy, POWER too doesn't look to have sufficient 
sales volume to matter; the trends are headed the wrong way.   OpenVMS 
is not going to bring enough new business to reverse the trends, either.

Going forward, x86-64 and maybe ARM AArch64 are the path for desktop 
and server operating systems, based on price and based on installed 
base.  Consolidation isn't fun, but leading-edge chips are 
large-chunks-of-a-trillion-dollars expensive to design and fabricate 
and are only available at affordable prices due to the economies of 
scale and massive volumes.

Barring a completely new and entirely successful design such as (maybe) 
"The Machine" — though insufficient details presently exist publicly 
for any meaningful prediction — incremental updates to x86-64 and 
incremental updates to ARM are where we are running our code, at least 
for the foreseeable future.

I'd expect to see VSI targeting whatever the follow-ons for 
<https://en.wikipedia.org/wiki/Xeon#E3-V3> 
<https://en.wikipedia.org/wiki/Xeon#E5-V3> 
<https://en.wikipedia.org/wiki/Xeon#E7-V3> might be, too.   As well as 
any comparable offerings then-available from AMD.


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