[Info-vax] The Machine - Dows Jones newswire report

johnwallace4 at yahoo.co.uk johnwallace4 at yahoo.co.uk
Tue Nov 29 11:12:51 EST 2016


On Tuesday, 29 November 2016 13:54:31 UTC, Neil Rieck  wrote:
> Here are a few more technical details:
> 
> https://www.extremetech.com/computing/240248-hp-demonstrates-next-generation-computing-prototype-machine-comes-together
> 
> Neil Rieck
> Waterloo, Ontario, Canada.
> http://www3.sympatico.ca/n.rieck/

So looking at the "detail" provided, it might well look
remarkably familiar (at concept level) to those who
remember the DEC/CPQ Wildfire concept: processors with
local cache and local bulk memory, and then slower access
to large scale memory further away. Done with cache
coherence as a requirement, because without CC you pretty
much might as well build separate standalone boxes (or
at least boxes with dynamically re-allocatable resources).
Further reading (in depth):
http://courses.cs.washington.edu/courses/cse590g/01wi/gharachorloo.pdf

The HP model still has massive latency differences
between local cache, local bulk, and remote bulk, and
appears to have largely abandoned global-scale cache 
coherency. Maybe that's fair enough, not everything
needs cache coherence all the time. Sometimes people
don't even care if the answer is right.


The HP remote bulk memory may in principle be
byte-rewritable but the devil is in the detail.
Systems which try to make everything look like
byte-addressable memory (even if it isn't) have been
around a while (e.g. MUMPS???). 

We'll see. In the meatime it fills column inches.



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