[Info-vax] VMS and the Internet of Things (IoT)

Simon Clubley clubley at remove_me.eisner.decus.org-Earth.UFP
Mon Sep 12 08:34:20 EDT 2016


On 2016-09-11, roger.ivie at gmail.com <roger.ivie at gmail.com> wrote:
> On Sunday, September 11, 2016 at 10:36:28 AM UTC-7, Simon Clubley wrote:
>> This is an example of what you can get for free in the RTOS world:
>> 
>> https://www.rtems.org/
>> 
>> If you want something that you pay for and which requires and takes
>> advantage of an MMU then there's QNX.
>
> Well, technically, anything running on a Cortex-A8 processor (such as
> the AM3358 used in the BeagleBone Black) makes use of the MMU, because
> it must to enable the cache; cacheability information comes from the
> MMU.
>

[I've added in your CPU to MMU correction from your later post.]

> Yes, I'm annoyed about it.

Yes, it is annoying as I've been there and had to handle that (multiple
times :-)) but setting up a minimal set of static page tables for the
MMU is easy enough.

In your BSP or bare metal startup code, all you need is a minimal table
of several entries which gives a top level view of which memory areas
need mapping and with what memory attributes.

You can then have a little MMU routine which walks through your table
and builds a level 1 section based page table (you don't need the
level 2 page based descriptors).

This is the approach I took to solve this and it's working fine for me.

Simon.

-- 
Simon Clubley, clubley at remove_me.eisner.decus.org-Earth.UFP
Microsoft: Bringing you 1980s technology to a 21st century world



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