[Info-vax] VAX VMS going forward

[John Reagan]

On Monday, July 27, 2020 at 1:43:51 PM UTC-4, Arne Vajhøj wrote:

> 
> It is not a 32 mode and a 64 bit mode.
> 
> The CPU always use 64 bit addresses.
> 
> A program is not running in any mode.
> 
> It is API's that can use either 64 bit addresses or 32 bit "compressed"
> addresses (by only passing the lower part and assuming high bits
> are all 0).
> 

32-bit addresses are SIGN extended to 64-bits.  The Alpha LDL instruction sign-extends for this reason.  S0 addresses 80000000 become FFFFFFFF.80000000.  Alpha always uses 64-bit addresses.

Itanium also uses 64-bit addresses exclusively.  Its 'ld4' instruction zero-extends so you'll see the compiler inserting 'sxt4' instructions to explicitly sign-extend a longword after a load to mimic the Alpha behavior.

x86 zero-extends as well with a 'movl', but has a richer instruction set so you'll see 'movslq' without the need for an extra sign-extend instruction.  x86 in 64-bit mode only has 64-bit addresses.  Many of the old school memory descriptor flags are simply ignored.