[Info-vax] Listeners in VMS Basic, was: Re: Integrity iLO Configuration?

abrsvc dansabrservices at yahoo.com
Mon Jul 12 13:11:55 EDT 2021


On Monday, July 12, 2021 at 12:46:27 PM UTC-4, abrsvc wrote:
> On Monday, July 12, 2021 at 12:43:13 PM UTC-4, abrsvc wrote: 
> > On Monday, July 12, 2021 at 12:28:37 PM UTC-4, Arne Vajhøj wrote: 
> > > On 7/12/2021 12:17 PM, abrsvc wrote: 
> > > > On Monday, July 12, 2021 at 11:02:35 AM UTC-4, Arne Vajhøj wrote: 
> > > >> On 7/12/2021 1:34 AM, Simon Clubley wrote: 
> > > >>> On 2021-07-10, abrsvc <dansabr... at yahoo.com> wrote: 
> > > >>>>> But I wonder why MOVZWL and not just MOVL! 
> > > >>>> 
> > > >>>> IRRC, the MOVZWL will take less memory since the immediate value will be smaller. 
> > > >>> 
> > > >>> It would be amusing if the more efficient sequences get translated 
> > > >>> to less efficient sequences on Alpha and above when using the Macro-32 
> > > >>> compiler and if a less efficient sequence on VAX actually translates 
> > > >>> to a more efficient sequence on Alpha and above. :-) 
> > > >> On Alpha both end up as: 
> > > >> 
> > > >> MOV 1, R0 
> > > > 
> > > > There is no "mov" on Alpha. What you will end up with is a load/store combination. 
> > > .title z 
> > > .psect $CODE quad,pic,con,lcl,shr,exe,nowrt 
> > > .entry z1,^m<r2,r3,r4,r5> 
> > > movl #1,r0 
> > > ret 
> > > .entry z2,^m<r2,r3,r4,r5> 
> > > movzwl #1,r0 
> > > ret 
> > > .end 
> > > 
> > > gave me: 
> > > 
> > > .PSECT $CODE, QUAD, PIC, CON, REL, 
> > > LCL, SHR, EXE, RD, NOWRT 
> > > 0000 Z1:: 
> > > 23DEFFC0 0000 LDA SP, -64(SP) 
> > > B77E0000 0004 STQ R27, (SP) 
> > > B75E0010 0008 STQ R26, 16(SP) 
> > > B45E0018 000C STQ R2, 24(SP) 
> > > B47E0020 0010 STQ R3, 32(SP) 
> > > B49E0028 0014 STQ R4, 40(SP) 
> > > B4BE0030 0018 STQ R5, 48(SP) 
> > > B7BE0038 001C STQ FP, 56(SP) 
> > > 47FE041D 0020 MOV SP, FP 
> > > 0024 $L1: 
> > > 47E03400 0024 MOV 1, R0 
> > > ; 000004 
> > > 0028 $L2: 
> > > ; 000005 
> > > 47FD041E 0028 MOV FP, SP 
> > > A79D0010 002C LDQ R28, 16(FP) 
> > > A45D0018 0030 LDQ R2, 24(FP) 
> > > A47D0020 0034 LDQ R3, 32(FP) 
> > > A49D0028 0038 LDQ R4, 40(FP) 
> > > A4BD0030 003C LDQ R5, 48(FP) 
> > > A7BD0038 0040 LDQ FP, 56(FP) 
> > > 23DE0040 0044 LDA SP, 64(SP) 
> > > 6BFC8001 0048 RET R28 
> > > 2FFE0000 004C UNOP 
> > > 
> > > Routine Size: 80 bytes, Routine Base: $CODE + 0000 
> > > 
> > > 0050 Z2:: 
> > > 23DEFFC0 0050 LDA SP, -64(SP) 
> > > B77E0000 0054 STQ R27, (SP) 
> > > B75E0010 0058 STQ R26, 16(SP) 
> > > B45E0018 005C STQ R2, 24(SP) 
> > > B47E0020 0060 STQ R3, 32(SP) 
> > > B49E0028 0064 STQ R4, 40(SP) 
> > > B4BE0030 0068 STQ R5, 48(SP) 
> > > B7BE0038 006C STQ FP, 56(SP) 
> > > 47FE041D 0070 MOV SP, FP 
> > > 0074 $L3: 
> > > 47E03400 0074 MOV 1, R0 
> > > ; 000007 
> > > 0078 $L4: 
> > > ; 000008 
> > > 47FD041E 0078 MOV FP, SP 
> > > A79D0010 007C LDQ R28, 16(FP) 
> > > A45D0018 0080 LDQ R2, 24(FP) 
> > > A47D0020 0084 LDQ R3, 32(FP) 
> > > A49D0028 0088 LDQ R4, 40(FP) 
> > > A4BD0030 008C LDQ R5, 48(FP) 
> > > A7BD0038 0090 LDQ FP, 56(FP) 
> > > 23DE0040 0094 LDA SP, 64(SP) 
> > > 6BFC8001 0098 RET R28 
> > > 
> > > Arne 
> > I stand corrected, but not in the way you think. The MOV FP,SP is actually a BIS FP,FP,SP instruction. 
> > While I can't recall what the Immediate sequence would be for MOV 1,RO, it too would be another instruction. 
> > The MOV is for the human reader and is a pseudo instruction. 
> > 
> > Dan
> Replying to myself because the memory cell recovered... 
> 
> The immediate load for the value 1 is likely LDA R0, 1(R31) ! recall that R31 = 0 
> 
> Dan

OK.  Create a main program that does a JSB into the routines you have listed above and use the debugger showing the instructions.
I was again wrong.  The MOV 1,R0 is actually also a BIS instruction as follows:  BIS R31,#X01,R0

Note that the same BIS instruction is created in both cases (MOVL and MOVSWL) on Alpha.

If I get time, I will boot up the VAX and show the code generated there as well.

Dan



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