[Info-vax] BASIC and AST routines
Dave Froble
davef at tsoft-inc.com
Wed Nov 24 09:18:30 EST 2021
On 11/24/2021 8:31 AM, Simon Clubley wrote:
> On 2021-11-23, VAXman- @SendSpamHere.ORG <VAXman- at SendSpamHere.ORG> wrote:
>> In article <snjcd1$9hn$2 at dont-email.me>, Simon Clubley <clubley at remove_me.eisner.decus.org-Earth.UFP> writes:
>>>
>>> That VMS API passes in a stack pointer, a PC and what were originally
>>> two architecture-specific registers.
>>
>> That doesn't answer your aspersions WRT Macro-32. Try, do try again.
>> I'll be waiting. Also, please tell me about this stack pointer you've
>> now claimed to be passed along too.
>>
>
> You are correct Brian. I wrongly thought it was the SP for some reason
> instead of the PS/PSL. However, passing an architecture-specific PS/PSL
> register to the AST is even more ridiculous than passing the SP.
>
>>
>>
>>> That kind of information simply would not be exposed at application
>>> code level in a modern version of that API as it would (rightly) be
>>> treated as an implementation specific detail that would be handled
>>> by the compiler.
>>
>> Oh, please explain then how are ASTs handled in *ix? <LOL>
>>
>
> Here is one example of how asynchronous callbacks are handled in Linux:
>
> https://linux.die.net/man/3/dlm_lock
>
> For a proper hardware-level callback when code is written in C, looking
> at microcontroller interrupt handlers would be a good example.
>
> In that world, you can either tag the interrupt handler with an __ISR
> attribute and let the compiler generate the correct code for you, or
> the underlying OS environment can wrap calls to the C language interrupt
> handler with an assembly language handler that is utterly invisible to
> the C language interrupt handler itself.
>
> Here is how one compiler for the PIC32MX (a MIPS MCU) handles this:
>
> https://microchipdeveloper.com/32bit:mx-arch-exceptions-usage
>
>>
>>
>>> That information is only needed because the lowest supported application
>>> language on VMS is Macro-32 and not C (or another comparable low-level
>>> language).
>>
>> You're slinging your BULLSHIT yet again. Macro-32 has no inherent need
>> or want to know R0, R1, the PC at AST delivery or the PS/PSL. As I have
>> requested previously, if you want to be slinging manure in here, please
>> show us your shovel.
>>
>
> Fine. So why are these architecture-specific registers passed to what
> is essentially a callback function in a normal application program
> and why do those registers need to be visible from that same callback
> function ?
>
> Simon.
>
Steve Hoffman answered that question way back up-thread. I'll leave it as an
exercise for you to go back and take a look.
--
David Froble Tel: 724-529-0450
Dave Froble Enterprises, Inc. E-Mail: davef at tsoft-inc.com
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