[Info-vax] x86-64 data aligment / faulting

[gah4]

On Sunday, February 27, 2022 at 12:58:20 PM UTC-8, Jan-Erik Söderholm wrote:

(snip, I wrote)

> > As well as I remember it, Alpha only has 32 bit and 64 bit aligned 
> > load/store instructions.

> https://en.wikipedia.org/wiki/DEC_Alpha#Byte-Word_Extensions_(BWX)

But does it really do 8 and 16 bit load/store, or just move the previous logic
into the instructions? 

Well, as noted by others, in most case the only question is access to cache.
Cache will load/store some larger unit.  But x86 needs the ability to do 
byte and word I/O operations, without the read/modify/write cycle it can
use on memory.  (Though with some complications on multi processor
systems.)

In the case of bytes and (16 bit) words, and before BWX, the load instruction
ignores the low bits, and loads the whole 32 or 64 bit unit.  (As well as I
know, Alpha still calls 16 bits 'word').   Then there are instructions to move
around bytes and 16 bit words between registers, that ignore the high bits.

But misaligned larger data units take somewhat more work. 

Does BWX allow, and especially process fast, load or store of a 64 bit
double from/to an odd address?