[Info-vax] x86-64 data alignment / faulting

[Scott Dorsey]

=?UTF-8?Q?Arne_Vajh=c3=b8j?=  <arne at vajhoej.dk> wrote:
>
>But not like what can be seen on Alpha and Itanium. My
>little test program showed a factor 300 impact
>on Itanium.

No architecture ever had as much cache pressure as Itanium.
Intel just kept adding more and more cache but all the cache in the world
was never enough.
--scott
-- 
"C'est un Nagra. C'est suisse, et tres, tres precis."