[Info-vax] VAX vs. MV/8000 [was Re: Hard links on VMS ODS5 disks]

Dan Cross cross at spitfire.i.gajendra.net
Sat Aug 26 15:09:00 EDT 2023


In article <ucdapd$ljc8$1 at dont-email.me>,
Arne Vajhøj  <arne at vajhoej.dk> wrote:
>On 8/26/2023 9:34 AM, Dan Cross wrote:
>> In article <ucbh82$8kpo$2 at dont-email.me>,
>> Arne Vajhøj  <arne at vajhoej.dk> wrote:
>>> [snip]
>>> DEC chose to have the VAX switch mode between 32 and
>>> 16 bit instructions (similar to what AMD did a couple
>>> of decades later).
>> 
>> One presumes you are referring to amd64 here.  If so, then nope,
>> amd64 is an extension to 32-bit x86, not a replacement in the
>> sense that the VAX ISA replaced the PDP-11 ISA when the mode bit
>> was set.
>> 
>> Even in 64-bit mode, many (most?) programs will continue to
>> operate as expected with 32- and even many 16- bit instructions.
>> The same was not true of the VAX.
>
>x86-64 in long mode has an emulation mode set via
>an emulation bit that allows it to execute 32 bit
>programs.
>
>That is the same as what VAX did for PDP-11
>compatibility.

Not even close.  PDP-11 compatibility mode on the VAX uses an
entirely different instruction encoding (PDP-11 encoding for
PDP-11 instructions) compared to VAX-native instructions.
http://bitsavers.trailing-edge.com/pdf/dec/vax/archSpec/EY-3459E-DP_VAX_Architecture_Reference_Manual_1987.pdf

By contrast, AMD64 mode shares most of the instruction space
with 32-bit x86.  `xorl %eax, %eax` works just fine in either
32-bit or 64-bit mode, with the exact same encoding.  AMD used
a prefix byte to indicate 64-bit operands to instructions.
For example, see Chapter 2 of
https://cdrdv2.intel.com/v1/dl/getContent/671110

Of course, the semantics of a few instructions do change (the
size of words on the stack changes, for example, so the `PUSH`
instruction behaves differently in 64-bit mode), but in this
regard, the mechanism is closer to what DG did than what DEC
did.

>The rule is that one cannot mix 64 bit and 32 bit
>code in the same process.

You should define what you mean here.  What do you mean by
"64-bit" and "32-bit" code?  And what do you mean when you say
that you "cannot mix" them "in the same process"?  As I
mentioned above, the instruction encoding is _mostly_ the same.

>Most 32 bit instructions actually work identical
>in 64 bit mode, but some produce different results
>and some causes a crash.

Correct.

>So executing 32 bit code not in compatibility mode
>is a big no no.

Incorrect.  Indeed, the optimization manual encourages using
32-bit instructions (ie, without a REX prefix) in some common
code sequences, even in 64-bit mode, for efficiency reasons.
For example, the quickest way to clear, e.g., `%rax` is
`xorl %eax, %eax`, as this is defined to sign-extend the upper
half of the register, and this has a more compact encoding.
https://cdrdv2.intel.com/v1/dl/getContent/671488.  See section
13.2.1 in particular, which directly contradicts your assertion
about 32-bit code in 64-bit mode:

|Assembly/Compiler Coding Rule 56. (H impact, M generality)
|Use the 32-bit versions of instructions in 64-bit mode to
|reduce code size unless the 64-bit version is necessary to
|access 64-bit data or additional registers.

Regardless, the salient point is that what x86 did is not a
universe switch into a totally foreign (non-native) ISA.  You
seem to be comflating this with difficulties stemming from
running totally unmodified 32-bit programs that assume a 32-bit
execution mode while in 64-bit mode.  But that is qualitatively
different than how instructions are encoded and used on x86 with
respect to the processor "mode", which is almost nothing like
how the VAX treated PDP-11 compatibility mode.

	- Dan C.




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