[Info-vax] Continued development of PDP-10 architecture [was Re: Hard links on VMS ODS5 disks]

[Rich Alderson]

jgd at cix.co.uk (John Dallman) writes:

> In article <1389dbdd-5e45-4688-a8ae-ff36de25ee78n at googlegroups.com>,
> gah4 at u.washington.edu (gah4) wrote:

>> On Wednesday, July 26, 2023 at 5:05:41_PM UTC-7, bill wrote:

>>> But now I have to wonder why they didn't just continue 
>>> development of the 10 and 20.  

>> Partly, the world was moving to 8 bit byte addressable systems.  
>> Or at least an 8 bit character set.  

>> But yes, it seems that many wondered that at the time.

> It looks like a commercial decision. As of 1982-83, when the decision was
> being made, VAX was wildly successful, and DEC-10 and DEC-20 were not
> growing fast. 

Yes and no.

The decision to discontinue the 36 bit line was partly technical and partly
company internal political.

First, the technical side.

The primary line of descent in the PDP-6/PDP-10 family went from the Model 166
processor to the KA-10 to the KI-10 to the KL-10.  (The KS-10 was a cut down
limited version of the larger system family.)  The KL-10 was based on a design
begun at Stanford Artificial Intelligence Laboratory because the KI-10 was not
a suitable replacement for the KA-10 with the BBN pager add-on; DEC bought the
design and hired the graduate student who maintained the CAD system developed
at SAIL (which became the standard design system at DEC for a number of years).
Unlike the previous systems, the KL-10 was a microcoded processor.

When the KL-10 was delivered in late 1974, it was already behind the curve in
terms of MIPS ratings and I/O throughput with regard to the leaders of the
industry, but its architecture was well liked by those who used it.  The next
processor began design soon after, but was too ambitious in its goals, delayed
by technical problems, and eventually cancelled in 1983.  Some of the features
were retrofitted to the KL-10 by updates to the microcode in conjunction with
additional hardware (larger address space--18 bits => 30 bits--was first around
1979, then the CI bus and clustering in 1986).  The follow-on, codenamed
"Jupiter", was supposed to be 2.5x a KL-10, but never got to even 2x in prototype.

All of this was going on while the middle management in the VAX world was
promoting Bell's "one architecture for everything" dream, pulling personnel and
funding from the other product lines, contributing to the delays which were the
nominal reason for the cancellation of Jupiter.

There were clone manufacturers as well.  Foonly was started by a SAIL alumnus,
and sold a few systems, but each one was essentially a prototype and boards
were not guaranteed to be interchangeable.  Systems Concepts delivered the
first of their offerings to Stanford LOTS (the academic computing facility
where I happened to be the systems programmer) on Hallowe'en 1986; they sold
quite a few, then licensed the design to Compuserve who built them for their
internal network.  XKL was founded by one of the cofounders of cisco Systems,
to build a desktop sized KL-10 clone he suggested to DEC management when he was
an engineer in Marlboro; XKL is still in business, selling very high end
optical networking gear whose control processors are dual FPGA clones of their
first product.

NB:  The processors in XKL's Darkstar products can run either TOPS-20 or an XKL
OS called DXMOS.  Anyone who would like to try out one of these systems can
check out the guest acccounts available at SDF.org .

-- 
Rich Alderson					  news at alderson.users.panix.com
      Audendum est, et veritas investiganda; quam etiamsi non assequamur,
	  omnino tamen proprius, quam nunc sumus, ad eam perveniemus.
									--Galen