[Info-vax] OT: IA-128 ???
John Wallace
johnwallace4 at yahoo.co.uk
Sat Oct 17 05:14:16 EDT 2009
On Oct 17, 9:49 am, JF Mezei <jfmezei.spam... at vaxination.ca> wrote:
> Marc Schlensog wrote:
> > A 128bit file system would be an entirely different story. But you
> > don't need a 128bit CPU for that.
>
> Lets say they were to produce an 8086 with 64 bit addressing, and 128
> bit registers and data paths.
>
> Are there many operations that were really benefit from that ?
>
> Moving long strings from one location to another would be faster since
> half the fetch/strore operations would be needed to move data around.
>
> But for integer math, would it really make a difference ? How many
> applications need to process numbers greater than 2^64 ? I think that
> even Bill Gates's net worth fits comfortably within 64 bits.
>
> Does IEEE already have a 128 version of the floating point
> representation ? Would creating 128but floating point registers provide
> advantages for high end computtional work (or video games) ?
>
> The move from 32 bit to 64 bit was made, as I recall, mostly to allow to
> go beyond the 4 gig of ram limit in 32 bit, and mostly to allow atabase
> engine to store more of s database in memory to increase performance.
>
> Perhaps going 128 bits addressing might allow mapping
> of very big files to memory ? In other words, you may not have more
> than 64 bit's worth of phyical memory, but your whole database of
> terabytes of records would be mapped to memory (think global section in
> VMS terns).
>
> Google might be a driver for this, when you consider it has huge
> databases (images for google erth street vie etc).
"Moving long strings from one location to another would be faster
since
half the fetch/strore operations would be needed to move data around."
Er, no. Many (most?) recent and current chips have a data bus width
which is not the same as the architecture's word length or word
length. Also, the data bus width between cache and main memory is
often determined by how main memory is populated - two identical banks
doubles the bus width between cache and main memory.
No value in IA128 there.
There's no chance the chap was just having a laugh, is there?
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