[Info-vax] Poulson info from Dave Cantor

[glen herrmannsfeldt]

John Reagan <johnrreagan at earthlink.net> wrote:
(snip)

> They are not MY compilers.   There are email addresses in the PPT slides 
> that Tim posted.  Ask them.
 
>> The author writes: "Itanium relies on compilers to aggressively
>> schedule instructions for parallel execution into bundles."
>> What does "...aggressivively schedule..." mean in terms of compiler
>> design ?

I would ask in comp.compilers.  It is moderated, but that is where
the people that really know compilers are.
 
> To get good execution on Itanium, a compiler needs to analyze the code to 
> figure out which things can be done in parallel or not.  It is then upto the 
> compiler to organize those in bundles according to the bundle type (which 
> only provides certain permutations).
 
> I suspect that code that runs today will run just fine in the future, but 
> assumes that code that "runs" today isn't technically illegal.  Remember the 
> situation with certain operations inside Alpha load-locked/store-conditional 
> sequences?  They "worked" in early Alphas, but newer Alphas caught them.  We 
> fixed the compilers but there was the worry that old .OBJs and .EXEs still 
> are out there.  Thats where the CHECK_SRM tool (or whatever its name is) 
> came from.  It lets you scan existing .EXEs to see if they have the bad 
> seqeunces.

That tends to be a problem with RISC, and even worse with VLIW.

Note that IBM's z/OS running on z/Architecture machines currently
in production will run object and executables written over 40 years
ago for OS/360 on S/360 hardware.  There are incompatible changes
in privileged instructions, but problem state code runs just fine.  

> If what the description says is true in that the chip can do more at once, a 
> compiler that 'gave up' after finding just a few parallel operations would 
> want to try harder to use the new additional resources.

-- glen