[Info-vax] Kittson question

[glen herrmannsfeldt]

JF Mezei <jfmezei.spamnot at vaxination.ca> wrote:
> On 14-12-31 20:57, Simon Clubley wrote:
 
>> An emulator for these very early ARM MCUs would have to take this into
>> account and if the VAX architecture allowed similar use on some models,
>> then I can see why a commercial emulator, which wants to mimic the
>> original hardware as closely as possible, would consider that overhead
>> to be acceptable.
 
> Say i am on a real Microvax II, and I have a pointer variable that
> contains a valid 24 bit address as well as my age in the high 
> order 8 bits.

For VAX, (virtual) addresses are 32 bits. 

For IBM S/360, addresses are 24 bits, and the high bits are ignored.
(S/360 runs real mode only.) OS/360 uses the high byte of many
addresses in control blocks, which complicated the move to 31
bit addressing with XA/370. 

At the time of VAX, this problem was known, and VAX is very good
at defining otherwise unused bits, usually MBZ (must be zero). 
 
> Wouldn't that simply generate an invalid access error and kill my
> application ?

I think so.
 
> Would it be fair to state that the emulator would only need to trim high
> order bits off addresses when kernel mode code tries to access physical
> memory ?

Like S/370, VAX uses a two level virtual address system. 

First, there are four address spaces, with the high two bits of
the 32 bit address selecting which one is used. Assuming you are less
than 64 years old, you will be in P0, the usual user space.

When the high bit is 1, the 32 bit virtual address is in system
space, where the page number indexes of SBR to find the page table
entry describing the physical page.

When the high bit is 0, the address is in user space P0 or P1,
(next to highest bit determines that). For P0, the P0BR and P0LR
(P0 base register and P0 length register) give the origin and length
of the user page table in system space. Page table entries give the
virtual (system space) address of the appropriate page table that
then gives the physical address.

This two level address system allows page tables to be paged.

P1 space grows down from higher addresses. P1LR gives the length
of the part that doesn't have page table entries. (That is, the
index has to be greater than or equal to P1LR.) 
 
> Wouldn't virtual memory access always get translated to physical memory
> adfdress that is pre-validated and not contain redundant bits in the
> virtual address page table ?

For user space, they are validated with P0LR nad P1LR. As far as I know,
no checks are done in system space, the OS is responsible for that.

But if paging is turned off, virtual address map directly to physical
addresses, and high bits are ignored.

As I noted above, S/370 uses 24 bit addresses, and the high bits
often got used by the OS. VAX avoided this problem, but 680x0 did not.

Many early Machintosh programs (or Mac OS) used high bits in address
words, complicating the transition to virtual memory with more 
than 16MB addressing.

-- glen