[Info-vax] VSI OpenVMS Alpha V8.4-2L1 Layered Product Subset Available

John Reagan xyzzy1959 at gmail.com
Wed Jul 12 11:48:39 EDT 2017


On Wednesday, July 12, 2017 at 10:00:02 AM UTC-4, Jan-Erik Soderholm wrote:
> Den 2017-07-12 kl. 15:48, skrev :
> > On Sunday, July 9, 2017 at 7:04:48 PM UTC-4,  wrote:
> > 
> >> We did not create special versions of the compilers. We just did a
> >> build with C, MACRO, and BLISS using the architecture-specific switches.
> >> This was for the entire operating system build, not just selected pieces.
> > 
> > Does a similar opportunity exist with the Itanium build of VMS?
> > 
> 
> Has Itanium added performance features in the later versions? That is,
> throught new instructions or other means that the compiler can use?
> 
> Oracle Rdb has for long been shipped in two versions, one "pre-EV56"
> and one "EV56 and later". From the Rdb 7.3 release (in March 2011)
> the "pre-EV56" kit was dropped altogether.
> 
> As I understand, the byte and word instructions come with the EV56
> release, so in that regard, EV56 and EV6 would be similar (?).

EV6 added ITOF and FTOI instructions to move values between the floating and integer registers without having to store/fetch from memory.  

EV6 also was the first out-of-order machine so a side-benefit was in the area of floating trap shadows.  Pre-EV6 machines required the compiler to follow specific rules for instructions that follow any floating instruction that might fault.  The rules allowed the OS's handler to back-up in the instruction stream.  With EV6, the hardware can "backup" so the faulting PC reported to the OS is the actual PC of the faulting floating instruction.  This allows GEM to perform better instruction scheduling with EV6 and beyond since it no longer has to worry about those older rules.



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