[Info-vax] VAX VMS going forward

Arne Vajhøj arne at vajhoej.dk
Wed Jul 29 11:12:07 EDT 2020


On 7/29/2020 8:21 AM, Simon Clubley wrote:
> On 2020-07-28, Arne Vajhøj <arne at vajhoej.dk> wrote:
>> On 7/28/2020 3:09 PM, Stephen Hoffman wrote:
>>> On 2020-07-28 15:42:44 +0000, John Reagan said:
>>>> On Monday, July 27, 2020 at 5:55:52 PM UTC-4, Stephen Hoffman wrote:
>>>>> Getting a flat address space and getting rid of the mumble() and
>>>>> mumble64() and 64-bit objects is no small development project, and
>>>>> that's past the remediations for the forever-32-bit-app dependencies
>>>>> that lurk.
>>>>
>>>> The address space is flat.  The CPU ensures that.  There are no
>>>> segment registers on Alpha, Itanium, and x86 (in its 64-bit hardware
>>>> mode).
>>>
>>> The CPU is certainly capable of this, yes. I've never stated that the
>>> Alpha and Itanium processors were not 64-bit. They are.
>>>
>>> But until we've expunged all discussions of P0, P1, and P2, OpenVMS has
>>> segmented addressing.
>>
>> Obviously that depends on how you define segmented memory.
>>
>> But using Wikipedia definition:
>>
>> https://en.wikipedia.org/wiki/Memory_segmentation
>>
>> <quote>
>> In a system using segmentation, computer memory addresses consist of a
>> segment id and an offset within the segment. A hardware memory
>> management unit (MMU) is responsible for translating the segment and
>> offset into a physical address, and for performing checks to make sure
>> the translation can be done and that the reference to that segment and
>> offset is permitted.
>> </quote>
>>
>> then no.
> 
> I would say yes because the segmented definition is wider than that.

You may say that. But do not be surprised when people assume a common
definition and not your definition.

> For example, I would consider Harvard architecture CPUs to have what is
> effectively segmented memory due to how different instructions are used
> to access different memory types, although I've never really thought of
> it as segmented memory until now.
> 
> I mention that because the above definition doesn't even begin to address
> Harvard architectures, let alone those architectures which have multiple
> independent memory spaces with their own addressing (for example AVR).

That definition applies equally well to Von Neumann and Harvard.

> In Stephen's case, what you are allowed to do with the various parts
> of the user accessible address space at VMS API level depends on which
> part of the address space you are trying to use.
> 
> I would call that segmented memory.

You may.

But be prepared for confusion, because it is not the normal
definition.

Arne




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